The present invention claims the benefit of Korean Patent Application No. 71123/2001 filed in Korea on Nov. 15, 2001, which is hereby incorporated by reference.
1. Field of the Invention
The present invention relates to a semiconductor doping method, and more particularly, to a semiconductor doping method and a liquid crystal display device fabricating method using the same.
2. Description of the Related Art
Currently, active matrix liquid crystal display (LCD) devices are commonly used as large-scaled, high picture quality flat panel display devices, and include a pixel thin film transistor formed within each pixel for displaying an actual image and controlling liquid crystal molecules, and a driving circuit thin film transistor for applying a signal to a gate line and a data line to operate the pixel thin film transistor and applying a picture signal to a pixel electrode.
A driving circuit unit may be commonly divided into two types: an external signal driving circuit and an internal signal driving circuit. The external signal driving circuit is formed on an external substrate of a liquid crystal display panel, separately from a pixel driving TFT, and connected to the liquid crystal panel. The internal signal driving circuit is formed integrally with the pixel driving TFT on the liquid crystal display panel. A CMOS (Complimentary Metal Oxide Semiconductor) TFT that uses a polycrystalline silicon (p-Si) with a high junction field effect mobility is commonly used for the internal signal driving circuit. The internal signal driving circuit that uses the CMOS TFT is advantageous because fabrication costs may be reduced, switching effect is improved compared to an external driving type integrated circuit, and fabrication may be accomplished using the same processes for fabricating the pixel driving TFT.
FIG. 1 is a cross sectional view of a liquid crystal display device according to the related art. In FIG. 1, the liquid crystal display device is divided into a pixel unit in which liquid crystal molecules are aligned as an external signal is applied thereto, and a driving circuit unit for applying a signal to the pixel unit. The driving circuit unit includes a region xe2x80x9cAxe2x80x9d where an NMOS TFT is formed and a region xe2x80x9cBxe2x80x9d where a PMOS TFT is formed.
The NMOS TFT formed within the region xe2x80x9cAxe2x80x9d of the driving circuit unit and the pixel unit have an LDD (Light Doped Drain) structure that includes a buffer layer 3 stacked on a transparent glass substrate 1, intrinsic semiconductor layers (i.e., channel layers) 4a and 4b made of a p-Si, nxe2x88x92 doped LDD layers 5a and 5b, and n+ layers 6a and 6b formed on the buffer layer 3, a gate insulation layer 9 formed over the entire substrate 1 upon which the channel layers 4a and 4b, the LDD layers 5a and 5b, and the n+ players 6a and 6b are formed, gate electrodes 2a and 2b formed at the channel layers 4a and 4b on the gate insulation layer 9, an interlayer 13 stacked throughout the entire substrate 1 upon which the gate electrode electrodes 2a and 2b are formed, source/drain electrodes 11a and 11b formed on the interlayer 13 and connected to the n+ layers 6a and 6b through a via hole, and a passivation layer 15 stacked throughout the entire substrate with the TFT formed thereon. A pixel electrode 17 is formed on the passivation layer 15 of the pixel unit and is connected to the source/drain electrode 11a through a contact hole. The pixel electrode drives a liquid crystal material, thereby displaying image data when a signal is applied thereto.
The PMOS TFT formed at the region xe2x80x9cBxe2x80x9d of the driving circuit unit includes a buffer layer 3 stacked on a transparent glass substrate 1, a channel layer 4c and a p+ layer 7 formed on the buffer layer 3, a gate insulation layer 9 stacked throughout the entire substrate 1 where the channel layer 4c and the p+ layer 7 are formed, a gate electrode 2c formed at the region of the channel layer 4c on the gate insulation layer 9, an interlayer 13 stacked throughout the entire substrate 1 upon which the gate electrode 2c is formed, source/drain electrode 11a and 11b connected to the p+ layer 7 through a contact hole, and a passivation layer 15 stacked throughout the entire substrate with the PMOS TFT formed thereon. The driving circuit CMOS TFT is integrally formed with the pixel TFT and applies a signal to the pixel TFT through the data line and the gate line.
In general, the NMOS TFT formed in the pixel unit and the driving circuit unit is completed by performing n+ doping after the channel layer and the LDD layer are partially blocked by patterning the photoresist. In case of doping an n-type ion with a relatively big mass such as phosphor ion, the n-type ion penetrates into the photoresist, causing deformation of a chemical structure of the photoresist, thereby influencing display quality of the liquid crystal display device.
For the explanation of the doping phenomenon of the MOS TFT formed at the liquid crystal display device with the driving circuit integrally formed therewith, the MOS FET formed at both the pixel unit and the driving circuit unit is to be illustrated and explained. In this respect, however, considering that the NMOS FET is commonly formed at the pixel unit and the driving circuit unit, only the driving circuit unit will now be explained with omission of description for the pixel unit.
FIGS. 2A-2C are cross sectional views of an ion doping method according to the related art. In FIG. 2A, at regions xe2x80x9cAxe2x80x9d and xe2x80x9cBxe2x80x9d of the buffer layer 3 on the substrate 1, the semiconductor layer (not shown), the gate insulation layer 9 and the gate electrodes 2b and 2c are formed. When the LDD doping is performed, the gate electrodes 2b and 2c block the ion doping, thereby forming the channel layers 4b and 4c. Then, a low concentration of n-type ions is doped at both sides of the channel layers 4b and 4c, thereby forming the LDD layers 5b and 5c. 
In FIG. 2B, a photoresist layer 20 is formed at a portion of the LDD layer 5b and over the entire region xe2x80x9cBxe2x80x9d to block a portion of the LDD layer 5b and the region xe2x80x9cB.xe2x80x9d In general, patterning of a photoresist material is completed by soft baking the coated photoresist at a temperature of about 100xc2x0 C., and photocured by irradiating an ultraviolet light onto the soft baked photoresist material. Then, a high dose of n-type ions are implanted thereon with a high acceleration energy.
In FIG. 2C, the portion of the LDD layer 5b of the region xe2x80x9cAxe2x80x9d is changed to an n+ layer 6b, and the photoresist layer is removed. Then subsequent processing, such as interlayer, source/drain, and passivation processes are performed to complete the NMOS TFT of the LDD structure. Although not shown in the drawings, the LDD layer 5c of the region xe2x80x9cBxe2x80x9d is changed to a PMOS TFT according to a p+ doping.
In the driving circuit integrated liquid crystal panel, in order to form the NMOS TFT of the pixel unit and the NMOS TFT of the driving circuit unit, in a state that a portion of the semiconductor layer is blocked, the high dose of n-type ions uses a high acceleration energy. Since the phosphor is the commonly selected n-type ion used for the n+ doping and has a relatively large mass, if the high dose/high acceleration energy is performed, the n-type ions penetrate into the photoresist layer, thereby deforming the chemical structure of the photoresist material. The chemical deformation of the photoresist material changes a reaction with a developer, thereby making it impossible to completely strip the photoresist layer 20 after doping. As a result, portions of the photoresist material remain on the gate insulating layer 9, thereby generating defects in the TFT.
FIGS. 3A-3C are cross sectional views of another ion doping method according to the related art. In FIG. 3A, an LDD doping is performed to form the channel layers 4b and 4c and LDD layers 5b and 5c on semiconductor layers of the regions xe2x80x9cAxe2x80x9d and xe2x80x9cB.xe2x80x9d Then, as shown in FIG. 3B, the gate insulation layer 9 is entirely etched except for a portion of below the gate electrodes 2b and 2c. Subsequently, after a photoresist material is coated, a photoresist layer 20 is formed at a portion of the LDD layer 5b of the region xe2x80x9cAxe2x80x9d and throughout the entire region of xe2x80x9cBxe2x80x9d through soft baking, exposure, and development processes. Then, in a state that a portion of the LDD layer 5b and the region xe2x80x9cBxe2x80x9d are blocked, the n-type ion is doped thereon using a low acceleration energy. Next, a portion of the LDD layer 5b is changed to the n+ layer 6b according to the n-type doping, thereby completing an NMOS TFT of the LDD structure including the LDD layer 5b and the n+ layer 6b. 
Although the gate insulation layer 9 is stripped, except for the portion below the gate electrode 2b and 2c, even in a case where only the gate insulation layer 9 above the n-type doping region is etched, n-type doping can be performed with a low acceleration energy. In this method, since the gate insulation layer 9 does not exist at the doping region, the n-type ion can be doped with a low acceleration energy. Consequently, the amount of n-type ions penetrating into the photoresist material is reduced, thereby preventing chemical deformation of the photoresist material. Thus, during etching of the photoresist material after the doping process, no residual photoresist remains on the gate insulation layer 9. However, in this method, etching the gate insulation layer 9 is an additional process step, thereby increasing fabrication costs and generating contact defects between the semiconductor layer and the source/drain electrodes following formation of the semiconductor layer. Accordingly, the semiconductor layer in the region xe2x80x9cBxe2x80x9d is damaged when the gate insulation layer 9 is etched.
Accordingly, the present invention is directed to a semiconductor doping method and liquid crystal display device fabricating method using the same that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a semiconductor doping method in which a photoresist material may be completely removed without any residual material.
Another object of the present invention is to provide a polycrystalline thin film transistor fabricating method adopting the semiconductor doping method.
Another object of the present invention is to provide a liquid crystal display device fabricating method adopting the semiconductor doping method.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described herein, a semiconductor doping method includes steps of forming an insulation layer on a substrate, forming a semiconductor layer on the insulation layer, forming a photoresist layer on the insulation layer, patterning the photoresist layer to provide a portion of the photoresist layer on a first portion of the semiconductor layer, hard baking the portion of the photoresist layer at a first hard-baking temperature of more than about 140xc2x0 C., doping the semiconductor layer with an impurity in regions other than the first portion of the semiconductor layer, and removing the portion of the photoresist layer.
In another aspect, a polycrystalline thin film transistor fabricating method includes steps of forming an insulation layer on a substrate, forming an amorphous semiconductor layer on the insulation layer, crystallizing the amorphous semiconductor layer to form a polycrystalline semiconductor layer, forming a gate insulation layer on entire surface of the substrate and the polycrystalline semiconductor layer, forming a gate electrode on the gate insulation layer, forming a photoresist layer on the gate electrode, patterning the photoresist layer to provide a portion of the photoresist layer on a first portion of the polycrystalline semiconductor layer, baking the photoresist layer at a first temperature of more than about 140xc2x0 C., doping the polycrystalline semiconductor layer with an impurity at a first concentration in regions other than the first portion of the polycrystalline semiconductor layer to form a channel layer and an impurity semiconductor layer, removing the photoresist layer, forming an insulation layer on the gate electrode and gate insulation layer, and forming source/drain electrodes in electrical contact with the impurity semiconductor layer on the insulation layer; and forming a passivation layer on the source/drain electrodes and insulation layer.
In another aspect, a method of fabricating a liquid crystal display device with a driving circuit integrally formed therewith includes steps of forming a buffer layer on a pixel unit and first and second regions of a driving circuit unit of a first substrate, forming an amorphous semiconductor layer on the buffer layer, crystallizing the amorphous semiconductor layer to form a polycrystalline semiconductor layer, forming a gate insulation layer on entire surface of the buffer layer and the polycrystalline semiconductor layer, doping the polycrystalline semiconductor layer to form a channel region and lightly doped drain regions, forming a photoresist layer on entire surface of the gate insulation layer, pattering the photoresist layer to form a first photoresist layer over the lightly doped drain regions formed in the pixel unit and a first region of the driving circuit unit, and over a second region of the driving circuit unit, baking the first photoresist layer at a first temperature of more than about 140xc2x0 C., doping a portion of the lightly doped drain regions formed in the pixel unit and the first region of the driving circuit unit to form first impurity semiconductor regions, removing the first photoresist layer, forming a second photoresist layer over the pixel unit and the first region of the driving circuit unit, doping the lightly doped drain regions in the second region of the driving circuit unit with a second impurity to form second impurity semiconductor regions, removing the second photoresist layer, forming an interlayer on an entire surface of the gate insulation layer, forming a plurality of via holes exposing portions of the first and second impurity semiconductor regions, forming a metal layer on the interlayer and within the plurality of via holes to form pairs of source/drain electrodes in electrical contact with exposed portions of the first and second impurity semiconductor regions, and forming at least one passivation layer on an entire surface of the interlayer and the pairs of source/drain electrodes.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.